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Senior Engineer - Memory Circuit Design Verification

Micron

Listed 26 Jun 2026

HyderabadHIGHigh payGCC
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Req. ID: JR91752 Senior Engineer - Memory Circuit Design Verification Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities * Minimum 3 yrs of experience with Masters background is preferrable. * Responsibilities for fastspice (Primesim/FineSim/SpectreFx) based verification to sign-off DRAM Critical Timings. * Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. * Full Chip Analog Spice Simulation and Analysis across PVTs and Speed Grades. * Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs. * Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. * Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products. * collaborate with cross—geo teams (US, Japan) to develop new verification flows to take on the challenges in DRAM and emerging memory design. * Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Good to Have Skills/Experience * Good understanding of analog/mixed signal circuits and full-chip activities * Fundamental knowledge of CMOS and FinFET technologies. * Experience in Analog and Mixed signal Verification, understand the usage of tools like Virtuoso, FineSim, Hspice, Xcelium, SimVision, WaveView. * Hands on experience in building SPICE testbenches at Block, Full chip Level. Hand on experience in building the Analog Full Chip Verification environment is a plus. * Good Knowledge on Static Timing Analysis Concepts * Hands on experience in SV, UVM based Verification * Good scripting skills using Perl, Python is a plus. * Previous work experience in Memory (HBM/DRAM/SRAM) related fields is a plus. * Good Knowledge on DRAM Memory and Critical Timing Concepts is a big plus. * Must possess good communication, debugging skills and ability to work well in a team. Job Profile(s): Semiconductor Design Engineer 3 Relocation level: (TBD) Before Getting Started Please review Micron’s Internal Job Application Policy on your regional PeopleNow Career Opportunities page before searching and applying for jobs. Note in particular that: * Hiring managers may view your performance appraisals, original resume, transcripts or other performance-related documentation in your personal file. This information will be held in confidence. * If you are selected to interview for a position, you must notify your direct supervisor before participating in the interview process. ​​​​ As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.